发明名称 TRENCH CONFINED EPITAXIALLY GROWN DEVICE LAYER(S)
摘要 Trench-confined selective epitaxial growth process in which epitaxial growth of a semiconductor device layer proceeds within the confines of a trench. In embodiments, a trench is fabricated to include a pristine, planar semiconductor seeding surface disposed at the bottom of the trench. Semiconductor regions around the seeding surface may be recessed relative to the seeding surface with Isolation dielectric disposed there on to surround the semiconductor seeding layer and form the trench. In embodiments to form the trench, a sacrificial hardmask fin may be covered in dielectric which is then planarized to expose the hardmask fin, which is then removed to expose the seeding surface. A semiconductor device layer is formed from the seeding surface through selective heteroepitaxy. In embodiments, non-planar devices are formed from the semiconductor device layer by recessing a top surface of the isolation dielectric. In embodiments, non-planar devices CMOS devices having high carrier mobility may be made from the semiconductor device layer.
申请公布号 EP2901472(A1) 申请公布日期 2015.08.05
申请号 EP20130840768 申请日期 2013.06.20
申请人 INTEL CORPORATION 发明人 PILLARISETTY, RAVI;SUNG, SEUNG HOON;GOEL, NITI;KAVALIEROS, JACK T.;DASGUPTA, SANSAPTAK;LE, VAN H.;RACHMADY, WILLY;RADOSAVLJEVIC, MARKO;DEWEY, GILBERT;THEN, HAN WUI;MUKHERJEE, NILOY;METZ, MATTHEW V.;CHAU, ROBERT S.
分类号 H01L29/786;B82Y10/00;B82Y40/00;H01L21/20;H01L21/336;H01L29/06;H01L29/66;H01L29/775 主分类号 H01L29/786
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