发明名称 Reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device
摘要 A solution for reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device is disclosed.
申请公布号 US9099187(B2) 申请公布日期 2015.08.04
申请号 US201314038684 申请日期 2013.09.26
申请人 BiTMICRO Networks, Inc. 发明人 Bruce Rolando H.;Lanuza Reyjan C.;Lukban Jose Miguel N.;Arcedera Mark Ian A.;Chong Ryan C.
分类号 G06F12/02;G11C16/16;G06F3/06 主分类号 G06F12/02
代理机构 代理人 Uriarte Stephen
主权项 1. An electronic storage device-enabled method of reducing erase cycles in an electronic storage device that uses non-volatile solid-state memory devices, including erase-limited memory devices that each include a plurality of non-volatile memory cells, the method comprising: creating a logical storage unit in one of the non-volatile memory cell, the logical storage unit comprising a first flop that includes at least one flop section, including a first flop section and a second flop section; wherein the non-volatile solid-state memory devices are configured to reduce erase cycles; mapping a first address to said first flop; reading said flop sections from said first flop using a section selection sequence; storing data associated with said first address in said first flop by writing said data into said first flop section and storing a first value representing said first flop section location into a valid flop section location; if said data is changed, storing said changed data into said second flop section, assigning said first flop section with an invalid status, storing said changed data in said second flop section, and assigning a valid status to said changed data; and limiting said data to have a data size that is no more than the flop section size of said at least one flop section.
地址 Fremont CA US