发明名称 CIRCUIT SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
摘要 The present invention provides a circuit substrate that can reduce Cgd capacitance, sufficiently prevent the influence of Cgd capacitance on applied voltage, together with sufficiently make the reliability of the circuit substrate favorable, to provide a method of manufacturing thereof, and a display device. The circuit substrate of the present invention is a circuit substrate with a semiconductor element arranged on a transparent substrate, in which the semiconductor element is provided with an oxide semiconductor layer; the circuit substrate is provided with an etch-stop layer and a conductive layer, having a region overlapping with neither the etch-stop layer nor the conductive layer, and with at least one portion of the region overlapping with a cutout portion of the oxide semiconductor layer, when the main surface of the circuit substrate is planarly viewed; and a portion of an edge of a cutout portion of the oxide semiconductor layer is located on a side of the etch-stop layer beyond an edge of the etch-stop layer, when the main surface of the circuit substrate is planarly viewed.
申请公布号 US2015214375(A1) 申请公布日期 2015.07.30
申请号 US201314426234 申请日期 2013.09.05
申请人 Sharp Kabushiki Kaisha 发明人 Hara Yoshihito;Nakata Yukinobu
分类号 H01L29/786;H01L29/45;H01L29/66;H01L27/12;H01L21/441;H01L21/465;H01L21/4757;H01L29/24;H01L21/02 主分类号 H01L29/786
代理机构 代理人
主权项 1. A circuit substrate comprising: a transparent substrate; a semiconductor element disposed on the transparent substrate, said semiconductor element including a patterned oxide semiconductor layer; an etch-stop layer covering at least a center portion of the oxide semiconductor layer, the etch-stop layer being made of an insulating material and having an opening therein; and a patterned conductive layer covering at least a portion of the etch-stop layer, the patterned conductive layer including a source electrode, a source wiring line, and a drain electrode, wherein a part of an edge of the oxide semiconductor layer is defined by an edge of the opening in the etch-stop layer and is tucked under said edge of the etch-stop layer.
地址 Osaka JP