发明名称 Display device and electronic device using the same
摘要 A display device with a compensation circuit that applies a fixed potential constantly to a gate electrode of a driving transistor for a certain period is provided. Specifically, each difference voltage value between an anode and a cathode of the light emitting element is utilized in the case where the light emitting element emits light and emits no light. In a case where the light emitting element emits light, a potential of the gate electrode of the driving transistor is to be held; and in a case where the light emitting element emits no light, a potential that certainly turns off the gate electrode of the driving transistor is kept on applying to the gate electrode of the driving transistor.
申请公布号 US9093571(B2) 申请公布日期 2015.07.28
申请号 US201213681556 申请日期 2012.11.20
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Osame Mitsuaki;Kato Taichi
分类号 H01L33/00;G09G3/32 主分类号 H01L33/00
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A display device comprising: a first transistor; a second transistor; a third transistor; a fourth transistor, a fifth transistor; and a pixel electrode, wherein one of a source and a drain of the first transistor is directly connected a signal line, wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor and one of a source and a drain of the third transistor, wherein one of a source and a drain of the second transistor is directly connected to a gate of the third transistor and the pixel electrode, wherein the other of the source and the drain of the second transistor is directly connected to one of a source and a drain of the fifth transistor, wherein the other of the source and the drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor, wherein the other of the source and the drain of the fourth transistor is electrically connected to a power source line, wherein the other of the source and the drain of the fifth transistor is electrically connected to the power source line, wherein a gate of the first transistor and a gate of the fourth transistor are directly connected to a first scan line, and wherein a gate of the fifth transistor is directly connected to a second scan line.
地址 Kanagawa-ken JP