发明名称 FABRICATING A VIA
摘要 <p>In one aspect, a method of fabricating a via in a hole of an isolation material includes depositing a first conductive material in the hole of the isolation material, removing a portion of the first conductive material deposited in the hole, depositing a second conductive material on the first conductive material in the hole and removing, using chemical-mechanical polishing (CMP), a portion of the second conductive material deposited on the first conductive material.</p>
申请公布号 WO2015108837(A2) 申请公布日期 2015.07.23
申请号 WO2015US11104 申请日期 2015.01.13
申请人 ALLEGRO MICROSYSTEMS, LLC 发明人 ERIE, DAVID, G.;HELD, RUEDIGER
分类号 H01L21/768 主分类号 H01L21/768
代理机构 代理人
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