发明名称 RECEIVER ARCHITECTURE
摘要 A receiver architecture for carrier aggregation is disclosed. In an exemplary design, an apparatus (e.g., a wireless device, a circuit module, etc.) includes a plurality of low noise amplifiers (LNAs), a plurality of switches, and at least one downconverter. The LNAs receive and amplify at least one input radio frequency (RF) signal and provide at least one amplified RF signal. The switches are coupled to the outputs of the plurality of LNAs. The at least one downconverter is coupled to the plurality of switches, downconverts the at least one amplified RF signal, and provides at least one downconverted signal. The switches reduce the number of downconverters needed to support reception of transmissions on multiple sets of carriers via multiple receive antennas. The LNAs and the switches may be implemented on at least one front-end module or a back-end module. The downconverter(s) are implemented on the back-end module.
申请公布号 EP2896130(A1) 申请公布日期 2015.07.22
申请号 EP20130767181 申请日期 2013.09.11
申请人 QUALCOMM INCORPORATED 发明人 CHANG, LI-CHUNG;GUDEM, PRASAD SRINIVASA SIVA;BOSSU, FREDERIC;HOLENSTEIN, CHRISTIAN
分类号 H04B1/00;H04B1/28 主分类号 H04B1/00
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