| 发明名称 |
ISOLATION BETWEEN SEMICONDUCTOR COMPONENTS |
| 摘要 |
In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package. |
| 申请公布号 |
US2015200162(A1) |
申请公布日期 |
2015.07.16 |
| 申请号 |
US201514593642 |
申请日期 |
2015.01.09 |
| 申请人 |
Fairchild Semiconductor Corporation |
发明人 |
CONSTANTINO John;LUK Timwah;ASHRAFZADEH Ahmad;KRAUSE Robert L.;SHACHAM Etan;QUINONES Maria Clemens Ypil;BRYZEK Janusz;WU Chung-Lin |
| 分类号 |
H01L23/538;H01L27/06;H01L49/02 |
主分类号 |
H01L23/538 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
a first semiconductor die; a second semiconductor die; and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die, the capacitive isolation circuit being disposed outside of the first semiconductor die and the second semiconductor die, the first semiconductor die, the second semiconductor die, and the capacitive circuit being included in a molding of a semiconductor package. |
| 地址 |
San Jose CA US |
