Reduced clock feed-through systems, methods and apparatus

摘要

Implementations of radio frequency switch controllers within the scope of the appended claims are configured to reduce the impact of the clock signal induced spurs. In particular, implementations of switch controllers described herein include a poly-phase clocking scheme, as opposed to a single phase to clock the charge pump stages of an negative voltage generator. In some implementations poly-phase clocking schemes reduce the clock signal induced spurs and may preclude the need for additional on-chip or off-chip decoupling capacitors that add to the cost and physical size of a complete front end module solution.

主权项

1. An apparatus comprising:
a controllable electrical source including at least two sub-circuits, each sub-circuit configured to receive a respective control signal and draw from a supply in response to receiving the respective control signal; and a control signal generator configured to provide at least two control signals separated by at least one non-zero phase difference; and a dither generator configured to dither at least one of the at least two control signals provided by the control signal generator.