发明名称 |
Linear equalizer circuit and method thereof |
摘要 |
A circuit having a first MOS transistor of a first type configured in a common-source amplifier topology for receiving an input signal and outputting an intermediate signal, a first MOS transistor of a second type configured in a self-biased topology biased via a first self-biasing RC network for providing termination for the intermediate signal, a second MOS transistor of the second type configured in a common-source amplifier topology for receiving the intermediate signal and outputting an output signal, and a second of MOS transistor of the first type configured in a self-biased topology via a second self-biasing RC network for providing termination to the output signal. |
申请公布号 |
US9082631(B1) |
申请公布日期 |
2015.07.14 |
申请号 |
US201414271509 |
申请日期 |
2014.05.07 |
申请人 |
REALTEK SEMICONDUCTOR CORP. |
发明人 |
Lin Chia-Liang (Leon) |
分类号 |
H01L27/11;H01L27/06;H03F3/45;H03F3/195;H03F3/21 |
主分类号 |
H01L27/11 |
代理机构 |
McClure, Qualey & Rodack, LLP |
代理人 |
McClure, Qualey & Rodack, LLP |
主权项 |
1. A circuit comprising:
a first MOS (Metal Oxide Semiconductor) transistor of a first type configured in a common-source amplifier topology for receiving an input signal and outputting an intermediate signal; a first MOS transistor of a second type configured in a self-biased topology biased via a first self-biasing RC network for providing termination for the intermediate signal; a second MOS transistor of the second type configured in a common-source amplifier topology for receiving the intermediate signal and outputting an output signal; and a second MOS transistor of the first type configured in a self-biased topology via a second self-biasing RC network for providing termination to the output signal. |
地址 |
Hsinchu TW |