Power integrated circuit including series-connected source substrate and drain substrate power mosfets

摘要

A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region parallel to channel current flow. The RESURF trenches have dielectric liners and electrically conductive RESURF elements on the liners. Source contact metal is disposed over the body region and source regions. A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer, and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region perpendicular to channel current flow. Source contact metal is disposed in a source contact trench and extended over the drain drift region to provide a field plate.

主权项

1. A semiconductor device, comprising:
a semiconductor substrate; a high voltage MOS transistor, including:
a heavily doped lower drain layer in said substrate, said lower drain layer having a first conductivity type with an average doping density greater than 1×1020 cm−3;a drain drift region disposed over said lower drain layer, said drain drift region having said first conductivity type with an average doping density between 1×1016 cm−3 and 1×1018 cm−3;a body region disposed in said substrate extending to a top surface of said substrate and contacting said drain drift region, said body region having a second conductivity type opposite from said first conductivity type;channel regions in said body region at a top surface of said body region abutting said drain drift region;source regions in said substrate abutting said channel regions opposite from said drain drift region, said source regions having said first conductivity type, so that channel current in said channel flows in a direction perpendicular to a boundary between said drain drift region and said channel regions;a gate dielectric layer over said channel regions;a gate over said gate dielectric layer;a plurality of RESURF trenches in said substrate cutting through said drain drift region and said body region, so that sidewalls of said RESURF trenches are perpendicular to said direction of channel current flow within fabrication tolerances used to form said semiconductor device, said RESURF trenches including:
RESURF dielectric liners on said sidewalls of said RESURF trenches; andelectrically conductive RESURF conductive elements on said RESURF dielectric liners;source contact metal disposed over said body region and in a source contact trench in said substrate, such that:
said source contact trench extends from said top surface of said substrate down to said body region and to said RESURF conductive elements, so that said source contact metal makes electrical contact to said body region and to said RESURF conductive elements at a bottom surface of said source contact trench;said source contact trench extends laterally to said source regions, so that said source contact metal makes electrical contact to said source regions at sidewalls of said source contact trench; andsaid source contact metal extends over said drain drift region and separated from a top surface of said drain drift region by a field plate dielectric layer; anddrain contact metal, said drain contact metal being electrically connected to said lower drain layer.