| 发明名称 | Electrostatic discharge (ESD) clamp circuit with high effective holding voltage | ||
| 摘要 | Boosted Electrostatic Discharge (ESD) clamp circuit with high effective holding voltage. In some embodiments, an integrated circuit may include a trigger circuit operably coupled to a first voltage bus and to a reference bus; a diode including an anode terminal operably coupled to a second voltage bus, the second voltage bus distinct from the first voltage bus; a transistor including a gate operably coupled to an output terminal of the trigger circuit, a drain operably coupled to a cathode terminal of the diode, and a source operably coupled to the reference bus; and an input/output (I/O) cell operably coupled to the first voltage bus, the second voltage bus, and the reference bus. | ||
| 申请公布号 | US9076656(B2) | 申请公布日期 | 2015.07.07 |
| 申请号 | US201313875618 | 申请日期 | 2013.05.02 |
| 申请人 | Freescale Semiconductor, Inc. | 发明人 | Etherton Melanie;Gerdemann Alex P.;Miller James W.;Moosa Mohamed S.;Ruth Robert S.;Stockinger Michael A. |
| 分类号 | H01L27/02 | 主分类号 | H01L27/02 |
| 代理机构 | Fogarty, L.L.C. | 代理人 | von Paumgartten Luiz;Fogarty, L.L.C. |
| 主权项 | 1. An integrated circuit, comprising: a trigger circuit operably coupled to a first voltage bus and to a reference bus; a diode including an anode terminal operably coupled to a second voltage bus, the second voltage bus distinct from the first voltage bus; a transistor including a gate operably coupled to an output terminal of the trigger circuit, a drain operably coupled to a cathode terminal of the diode, and a source operably coupled to the reference bus; and an input/output (I/O) cell operably coupled to the first voltage bus, the second voltage bus, and the reference bus. | ||
| 地址 | Austin TX US | ||