| 发明名称 |
INTEGRATED CIRCUIT COMPRISING BUFFER CHAIN |
| 摘要 |
Among other things, an integrated circuit and method for routing electrical pathways of an integrated circuit is provided. The integrated circuit comprises a buffer chain coupling a first cell of the integrated circuit to a second cell of the integrated circuit. An electrical pathway coupling a first inverter of the buffer chain with a second inverter of the buffer chain extends through a first set of metal layers and is routed to form a pulse-like shape having an apex at a top layer of the first set. |
| 申请公布号 |
US2015187666(A1) |
申请公布日期 |
2015.07.02 |
| 申请号 |
US201514658446 |
申请日期 |
2015.03.16 |
| 申请人 |
Taiwan Semiconductor Manufacturing Company Limited |
发明人 |
Chuang Yi-Lin;Chen Chien-Hui;Changchien Wei-Pin;Chien Chin-Her;Tseng Nan-Hsin |
| 分类号 |
H01L21/66;G06F17/50 |
主分类号 |
H01L21/66 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method, comprising:
identifying a fault within an integrated circuit; removing a first portion of a routing substrate to expose a first electrical pathway of a first buffer chain of the integrated circuit to determine whether a first defect is present in the first electrical pathway responsive to the identifying; and removing a second portion of the routing substrate to expose a second electrical pathway of a second buffer chain of the integrated circuit to determine whether a second fault is present in the second electrical pathway responsive to the identifying. |
| 地址 |
Hsin-Chu TW |
