Pads and pin-outs in three dimensional integrated circuits

摘要

A three dimensional semiconductor device, comprising: a substrate including a plurality of circuits; a plurality of pads, each pad coupled to a circuit; and a memory array positioned above or below the substrate and coupled to a circuit to program the memory array.

主权项

1. A semiconductor device, comprising:
a first layer including a circuit; a second layer including a plurality of circuits in a first plurality of locations; a third layer including a plurality of pads in a second plurality of locations, wherein the plurality of pads are inaccessible from the first layer; and a plurality of wire interconnects that are positioned through a first portion of the third layer and through a second portion of the second layer, wherein the circuit is configured to depend on the second layer to operate, wherein the first plurality of locations and the second plurality of locations are configured to be independent of the first layer, and wherein the first layer, the second layer, and the third layer form a stack.