FinFet integrated circuits with uniform fin height and methods for fabricating the same

摘要

Methods for fabricating FinFET integrated circuits with uniform fin height and ICs fabricated from such methods are provided. A method includes etching a substrate using an etch mask to form fins. A first oxide is formed between the fins. A first etch stop is deposited on the first oxide. A second oxide is formed on the first etch stop. A second etch stop is deposited on the second oxide. A third oxide is deposited overlying the second etch stop. An STI extends from at least a surface of the substrate to at least a surface of the second etch stop overlying the fins to form a first active region and a second active region. The first etch stop overlying the fins is removed. The third oxide is removed to expose the second etch stop. A gate stack is formed overlying a portion of each of the fins.

主权项

1. A method for fabricating a FINFET integrated circuit, the method comprising the steps of:
etching a bulk semiconductor substrate of a first silicon-comprising material using an etch mask to form a plurality of fins; forming a first oxide between the plurality of fins, the first oxide having a height measured from the bulk semiconductor substrate less than a height of the plurality of fins measured from the bulk semiconductor substrate; depositing a first etch stop layer on the first oxide and overlying the plurality of fins; forming a second oxide on the first etch stop layer; depositing a second etch stop layer on the second oxide and overlying the plurality of fins; depositing a third oxide overlying the second etch stop layer; forming a shallow trench isolation that extends from at least a surface of the bulk semiconductor substrate to at least a surface of the second etch stop layer overlying the plurality of fins to form a first active region and a second active region; removing the second etch stop layer from the plurality of fins of the first active region and the second active region; removing the second oxide after removing the second etch stop layer; removing the first etch stop layer overlying the plurality of fins of the first active region and the second active region; removing the third oxide to expose the second etch stop layer overlying the second oxide of the first active region and the second active region; and forming a gate stack extending from the first active region to the second active region and overlying a portion of each of the plurality of fins.