发明名称 Gate strain induced work function engineering
摘要 A stack of a gate dielectric layer and a workfunction material layer are deposited over a plurality of semiconductor material portions, which can be a plurality of semiconductor fins or a plurality of active regions in a semiconductor substrate. A first gate conductor material applying a first stress is formed on a first portion of the workfunction material layer located on a first semiconductor material portion, and a second gate conductor material applying a second stress is formed on a second portion of the workfunction material layer located on a second semiconductor material portion. The first and second stresses are different in at least one of polarity and magnitude, thereby inducing different strains in the first and second portions of the workfunction material layer. The different strains cause the workfunction shift differently in the first and second portions of the workfunction material layer, thereby providing devices having multiple different workfunctions.
申请公布号 US9070579(B2) 申请公布日期 2015.06.30
申请号 US201414515702 申请日期 2014.10.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Bajaj Mohit;Murali Kota V. R. M.;Nayak Rahul;Nowak Edward J.;Pandey Rajan K.
分类号 H01L27/092;H01L29/78;H01L21/8234;H01L21/8238;H01L21/84;H01L27/12 主分类号 H01L27/092
代理机构 Scully, Scott, Murphy & Presser, P.C. 代理人 Scully, Scott, Murphy & Presser, P.C. ;Cai Yumani
主权项 1. A semiconductor structure comprising: a first field effect transistor including a first semiconductor material portion, a first stack of a first portion of a gate dielectric layer and a first workfunction material portion located over said first semiconductor material portion, and a first gate conductor material layer applying a first stress to said first workfunction material portion, wherein said first workfunction material portion is under a first strain due to said first stress; and a second field effect transistor including a second semiconductor material portion, a second stack of a second portion of said gate dielectric layer and a second workfunction material portion located over said second semiconductor material portion, a second gate conductor material layer applying a second stress that is different from said first stress to said second workfunction material portion, wherein said second workfunction material portion is under a second strain due to said second stress, and said first strain and said second strain shift workfunctions of said first and second workfunction material portions differently, wherein said first semiconductor material portion and said second semiconductor material portion comprise a first semiconductor fin located on an insulating layer and a second semiconductor fin located on said insulating layer.
地址 Armonk NY US