发明名称 |
Digital radio frequency memory utilizing time interleaved analog to digital converters and time interleaved digital to analog converters |
摘要 |
A digital radio frequency memory (DRFM) comprises a plurality of time interleaved analog to digital converters (ADCs) in cooperation with a plurality of time interleaved digital to analog converters (DACs) to provide an effective sampling rate which may be greater than the clock rate of the system. A higher sampling rate at the ADC increases instantaneous bandwidth, while a higher sampling rate at the DAC improves spectral purity. The ADCs and DACs are time interleaved by supplying a clock signal to each ADC/DAC which is skewed with respect to the previous and subsequent skewed signal. In order to process the higher effective sampling rate, a pre-computation of DAC values for each high rate sample is performed by an SDAC algorithm that pipelines the calculations of the processed sample values provided to the DAC. A DAC bias correction is provided to adjust for drift in the DACs. |
申请公布号 |
US9071271(B1) |
申请公布日期 |
2015.06.30 |
申请号 |
US201414189947 |
申请日期 |
2014.02.25 |
申请人 |
Lockheed Martin Corporation |
发明人 |
Low Nathan E.;Walters Shawn |
分类号 |
H03M1/66 |
主分类号 |
H03M1/66 |
代理机构 |
Howard IP Law Group, PC |
代理人 |
Howard IP Law Group, PC |
主权项 |
1. A method of pre-calculating an input to a digital to analog converter (DAC) in a digital radio frequency memory (DRFM), the method comprising:
receiving a plurality of digital samples representative of a received RF waveform; determining a previous DAC value from said plurality of digital samples; computing a difference between a current digital sample and a previous digital sample; and adding said computed difference to said previous DAC input to calculate a new DAC input value. |
地址 |
Bethesda MD US |