Instruction and Logic for Non-Blocking Register Reclamation

摘要

A processor includes a logic to execute a first instruction and a second instruction. The first instruction is ordered before the second instruction. Each instruction references a respective logical register assigned to a respective physical register. The processor also includes logic to reassign a physical register of the second instruction to another logical register before retirement of the first instruction.

主权项

1. A processor, comprising:
a first logic to execute a first instruction and a second instruction, the first instruction ordered before the second instruction, the first instruction including a reference a first logical register assigned to a first physical register, the second instruction including a reference to a second logical register assigned to a second physical register; and a second logic to reassign the second physical register to another logical register before retirement of the first instruction.