发明名称 DIAGONAL HARDMASKS FOR IMPROVED OVERLAY IN FABRICATING BACK END OF LINE (BEOL) INTERCONNECTS
摘要 Self-aligned via and plug patterning using diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects is described. In an example, a method of fabricating an interconnect structure for an integrated circuit involves forming a first hardmask layer above an interlayer dielectric layer disposed above a substrate. The first hardmask layer includes a plurality of first hardmask lines having a first grating in a first direction and comprising one or more sacrificial materials interleaved with the first grating. The method also involves forming a second hardmask layer above the first hardmask layer. The second hardmask layer includes a plurality of second hardmask lines having a second grating in a second direction, diagonal to the first direction. The method also involves, using the second hardmask layer as a mask, etching the first hardmask layer to form a patterned first hardmask layer.
申请公布号 WO2015094502(A1) 申请公布日期 2015.06.25
申请号 WO2014US64156 申请日期 2014.11.05
申请人 INTEL CORPORATION 发明人 MYERS, ALAN M.;SINGH, KANWAL JIT;BRISTOL, ROBERT L.;CHAWLA, JASMEET S.
分类号 H01L21/768;H01L21/31;H01L21/60 主分类号 H01L21/768
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