| 发明名称 |
SEMICONDUCTOR STRUCTURE WITH TRL AND HANDLE WAFER CAVITIES |
| 摘要 |
A method is disclosed. The method comprises fabricating a device layer on a top portion of a semiconductor wafer that comprises a substrate. The device layer comprises an active device. The method also comprises forming a trap rich layer at a top portion of a handle wafer. The forming comprises etching the top portion of the handle wafer to form a structure in the top portion of the handle wafer that configures the trap rich layer. The method also comprises bonding a top surface of the handle wafer to a top surface of the semiconductor wafer. The method also comprises removing a bottom substrate portion of the semiconductor wafer. |
| 申请公布号 |
US2015179505(A1) |
申请公布日期 |
2015.06.25 |
| 申请号 |
US201514633024 |
申请日期 |
2015.02.26 |
| 申请人 |
Silanna Semiconductor U.S.A., Inc. |
发明人 |
Stuber Michael A.;Imthurn George |
| 分类号 |
H01L21/762;H01L27/12;H01L21/02;H01L21/84 |
主分类号 |
H01L21/762 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method comprising:
fabricating a device layer on a top portion of a semiconductor wafer that comprises a substrate, wherein the device layer comprises an active device; forming a trap rich layer at a top portion of a handle wafer, wherein the forming comprises etching the top portion of the handle wafer to form a structure in the top portion of the handle wafer that configures the trap rich layer; bonding a top surface of the handle wafer to a top surface of the semiconductor wafer; and removing a bottom substrate portion of the semiconductor wafer. |
| 地址 |
San Diego CA US |
