| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor memory integrated circuit capable of coping with both of high-speed and low-power consumption operations, and easily switching the operations, by using one chip.SOLUTION: A plurality of latch circuits includes: a plurality of decoders allocated to a plurality of banks; a plurality of latch circuits which are allocated to the decoders, and in which each of them holds addresses according to a latch circuit control signal; and a control circuit. When a bank active signal is input to the control circuit so that a predetermined bank out of a plurality of banks is selected, the latch circuit control signal is supplied to one latch circuit allocated to the selected bank, and the latch circuit control signal is not supplied to a component other than the latch circuit allocated to the selected bank.</p> |
