发明名称 Process for fabricating a ridge pin junction comprising spaced apart doped regions, application to the fabrication of electro-optical modulators and photodetectors
摘要 The invention relates to a process for fabricating a semiconductor ridge pin junction (20, 21). According to the invention, judicious choices are made when defining hard masks and the sequence in which resist masks are formed for implantation (doping) and etching, which choices enable the conventional photolithography technique to be used despite the low precision of mask alignment (±100 nm) relative to underlying regions.;By virtue of the process according to the invention, a ridge pin junction is formed, at lower cost and with shorter production times than in the prior art, with doped regions precisely spaced apart from the edge of the ridge.
申请公布号 US9065007(B2) 申请公布日期 2015.06.23
申请号 US201414468729 申请日期 2014.08.26
申请人 Commissariat a l'Energie Atomique et aux Energies Alternatives 发明人 Menezo Sylvie
分类号 H01L21/00;H01L31/18;H01L31/0232 主分类号 H01L21/00
代理机构 Norton Rose Fulbright US LLP 代理人 Norton Rose Fulbright US LLP
主权项 1. A process for fabricating a semiconductor ridge pin junction, comprising the following steps in succession: a) forming a first hard mask, consisting of a first strip and a second strip that are separated from each other, on a semiconductor layer, the distance W separating the two strips defining the width of the ridge whereas the unitary width of the first strip defines the spacing between the ridge and a p-doped region and the unitary width of the second strip defines the spacing between the ridge and an n-doped region; b) implanting a p-type and an n-type dopant, respectively, into a region and into a region, respectively, outside the first strip and the second strip, respectively; c) partially etching the semiconductor in the doped regions and regions of the semiconductor layer outside the space separating the two strips of hard mask; d) partially etching the semiconductor layer inside the space separating the two strips to define the height of the ridge of the pin junction; e) full-wafer deposition of a layer of hard material; f) carrying out full-wafer chemical-mechanical polishing (CMP) until the first strip and second strip of semiconductor layer protruding on either side of the ridge are reached in order to remove the first hard mask and to form a second hard mask covering the ridge, the doped regions etched in step c) and the regions of the semiconductor layer outside of the space and etched in step c); g) partially etching the first and second strips of the semiconductor layer left free by the second hard mask so as to define a slab on either side of the ridge and joined with the etched p-doped and n-doped regions thus forming the ridge pin junction; and h) removing the second hard mask,process in which the hard masks and resist masks formed in steps a) to d) are produced by photolithography.
地址 Paris FR