| 发明名称 | Structure of wafer level chip molded package | ||
| 摘要 | An integrated circuit structure includes a semiconductor chip having a die side and a non-die side, the die side having one or more trenches formed therein. The integrated circuit structure further includes at least one die bonded onto the die side of the semiconductor chip. The integrated circuit structure further includes a protecting material encapsulating the at least one die and substantially filling the one or more trenches. | ||
| 申请公布号 | US9064817(B2) | 申请公布日期 | 2015.06.23 |
| 申请号 | US201414149936 | 申请日期 | 2014.01.08 |
| 申请人 | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. | 发明人 | Lee Hsin-Hui;Cheng William |
| 分类号 | H01L23/544;H01L23/02;H01L21/00;H01L23/31;H01L21/56;H01L25/00;H01L23/00 | 主分类号 | H01L23/544 |
| 代理机构 | Lowe Hauptman & Ham, LLP | 代理人 | Lowe Hauptman & Ham, LLP |
| 主权项 | 1. An integrated circuit structure, comprising: a semiconductor chip having a die side and a non-die side, the die side having a first trench and a second trench formed therein, wherein a shape of the first trench is different from a shape of the second trench in a planar view; at least one die bonded onto the die side of the semiconductor chip, and at least one of the first trench or the second trench has a length greater than a length of the at least one die and less than a length of the semiconductor chip; and a protecting material encapsulating the at least one die and substantially filling the first trench and the second trench. | ||
| 地址 | TW | ||