Memory device

摘要

A memory device including at least one bit-line decoding circuit, at least one word-line decoding circuit, a plurality of memory blocks, and a plurality of switches is provided. The sizes of the plurality of memory blocks include at least one first size and a second size, and the first size is greater than the second size. The plurality of memory blocks with the first size are grouped as at least one first group, and the plurality of memory blocks with the second size are grouped as at least one second group. Compared to the first group, the second group is closer to the bit-line decoding circuit and/or the word-line decoding circuit. The switches are controlled by at least one control signal, so as to enable or disable the first group and/or the second group.

主权项

1. A memory device comprising:
at least one bit-line decoding circuit and at least one word-line decoding circuit; a plurality of memory blocks coupled to the at least one bit-line decoding circuit and the at least one word-line decoding circuit, sizes of the plurality of memory blocks at least comprising a first size and a second size, wherein the first size is greater than the second size, the plurality of memory blocks having the first size are grouped as at least one first group, the plurality of memory blocks having the second size are grouped as at least one second group, and in comparison with the at least one first group, the at least one second group is located closer to the at least one word-line decoding circuit and/or the at least one bit-line decoding circuit; and a plurality of switches coupled to the at least one first group and the at least one second group and controlled by at least one control signal, so as to enable or disable the at least one first group and/or the at least one second group according to the at least one control signal.