发明名称 SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
摘要 This semiconductor device (100) includes: a thin-film transistor (101); an interlevel insulating layer (14) including a first insulating layer (12); a first transparent conductive layer (15) formed on the interlevel insulating layer and having a first hole (15p); a dielectric layer (17) covering the side surface of the first transparent conductive layer closer to the first hole; and a second transparent conductive layer (19a) overlapping at least partially with the first transparent conductive layer via the dielectric layer, which has a second hole (17p). The first insulating layer has a third hole (12p). The interlevel insulating layer and dielectric layer have a first contact hole (CH1), the sidewall of which includes the side surfaces of the second and third holes (17p, 12p). At least a part of the side surface of the third hole is aligned with that of the second hole. The second transparent conductive layer contacts with the drain electrode in the first contact hole to form a contact portion (105), which at least partially overlaps with a gate line layer when viewed along a normal to a substrate.
申请公布号 US2015168758(A1) 申请公布日期 2015.06.18
申请号 US201214358778 申请日期 2012.11.15
申请人 Sharp Kabushiki Kaisha 发明人 Nakata Yukinobu;Fujita Tetsuo;Hara Yoshihito
分类号 G02F1/1368;H01L29/786;G02F1/1362;H01L27/12 主分类号 G02F1/1368
代理机构 代理人
主权项 1. A semiconductor device comprising a substrate and a thin-film transistor, a gate line layer and a source line layer which are supported by the substrate, wherein the gate line layer includes a gate line and the thin-film transistor's gate electrode, the source line layer includes a source line and the thin-film transistor's source and drain electrodes, the thin-film transistor includes the gate electrode, a gate insulating layer formed over the gate electrode, a semiconductor layer stacked on the gate insulating layer, and the source and drain electrodes, the semiconductor device further includes: an interlevel insulating layer which is formed over the source and drain electrodes and which includes a first insulating layer that contacts at least with the surface of the drain electrode; a first transparent conductive layer which is formed on the interlevel insulating layer and which has a first hole; a dielectric layer which is formed on the first transparent conductive layer and which covers a side surface of the first hole of the first transparent conductive layer; and a second transparent conductive layer formed over the dielectric layer so as to overlap with at least a portion of the first transparent conductive layer with the dielectric layer interposed between them, and wherein the dielectric layer has a second hole and the first insulating layer has a third hole, the interlevel insulating layer and the dielectric layer have a first contact hole, the sidewall of which includes respective side surfaces of the second and third holes, at least a portion of the side surface of the third hole being aligned with the side surface of the second hole, the second transparent conductive layer contacts with the drain electrode inside the first contact hole, thereby forming a contact portion where the second transparent conductive layer and the drain electrode contact with each other, and when viewed along a normal to the substrate, at least a part of the contact portion overlaps with the gate line layer.
地址 Osaka-shi, Osaka JP