发明名称 |
Audio output circuit, electronic device using the same, and audio integrated circuit |
摘要 |
An audio output circuit for driving an electro-acoustic transducer includes first and second D-class amplifiers, a pulse modulator to receive an audio signal and generate first and second pulse signals for driving first and second D-class amplifiers, first and second drivers to drive first and second D-class amplifiers in response to first and second pulse signals, respectively, a common mode choke coil, and a delay setting circuit to apply a relative delay to output signals of the first and second D-class amplifiers. |
申请公布号 |
US9059663(B2) |
申请公布日期 |
2015.06.16 |
申请号 |
US201313793317 |
申请日期 |
2013.03.11 |
申请人 |
ROHM CO., LTD. |
发明人 |
Munenaga Hideki;Onodera Takeshi |
分类号 |
H03F99/00;H03F3/00;H03F3/217 |
主分类号 |
H03F99/00 |
代理机构 |
Cantor Colburn LLP |
代理人 |
Cantor Colburn LLP |
主权项 |
1. An audio output circuit for driving an electro-acoustic transducer, comprising:
a first D-class amplifier; a second D-class amplifier; a pulse modulator configured to receive an audio signal to generate a first pulse signal and a second pulse signal for driving the first D-class amplifier and the second D-class amplifier, respectively; a first driver configured to drive the first D-class amplifier in response to the first pulse signal; a second driver configured to drive the second D-class amplifier in response to the second pulse signal; a common mode choke coil including a first coil, a second coil, and a core around which the first coil and the second coil are wound, one end of the first coil being connected to an output terminal of the first D-class amplifier and the other end of the first coil being connected to a positive terminal of the electro-acoustic transducer, and one end of the second coil being connected to an output terminal of the second D-class amplifier and the other end of the second coil being connected to a negative terminal of the electro-acoustic transducer; and a delay setting circuit configured to apply a relative delay to an output signal of the first D-class amplifier and an output signal of the second D-class amplifier. |
地址 |
JP |