发明名称 |
Self-aligned III-V MOSFET fabrication with in-situ III-V epitaxy and in-situ metal epitaxy and contact formation |
摘要 |
A method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing raised source/drain regions on the source/drain regions, the grown raised source/drain regions including III-V semiconductor material, and growing metal contacts on the grown raised source/drain regions. Another method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing metal contacts on the source/drain regions. Transistors and computer program products are also disclosed. |
申请公布号 |
US9059271(B2) |
申请公布日期 |
2015.06.16 |
申请号 |
US201313950777 |
申请日期 |
2013.07.25 |
申请人 |
International Business Machines Corporation |
发明人 |
Guo Dechao;Han Shu-Jen;Kim Jeehwan;Shiu Kuen-Ting |
分类号 |
H01L21/336;H01L29/78;H01L29/08;H01L29/417;H01L29/45;H01L29/66 |
主分类号 |
H01L21/336 |
代理机构 |
Harrington & Smith |
代理人 |
Harrington & Smith ;Percello Louis J. |
主权项 |
1. A method for forming a transistor, comprising:
providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate comprising source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions; and growing metal contacts on the source/drain regions; wherein growing metal contacts further comprises providing a carrier gas carrying a precursor in a reactor at a predetermined pressure while the III-V substrate has a predetermined temperature; and wherein the precursor comprises dimethyl-ethyl amine alane (DMEAA) and the predetermined temperature is between 150 Centigrade (C) −360 C. |
地址 |
Armonk NY US |