Multi-threaded multi-format blending device for computer graphics operations

摘要

The disclosed invention provides a solution for the problem of blending colors in a graphics processing unit. The plurality of blending equations used in various graphics layers is performed with a programmable streaming processor. Multiple simultaneous threads are used to eliminate pipeline latency and memory stalls. Overlays of predefined blending modes are used to minimize the time instruction memory is updated.;The processing unit includes: (a) an instruction memory (b) hardware context registers for each executing stream (c) pipelined arithmetic units of predefined precision, including support for floating point (d) units that convert multi-format data to and from floating point precision (e) Look-up tables for quick color space transformations.

主权项

1. A device for parallel multithreaded blending in graphics systems comprising:
means to receive a plurality of color components and alpha information from multiple source and multiple destination image fragment streams; a blender processing unit capable of combing in parallel the color and alpha channels from a plurality of pixels in the source and destination images in order to produce a plurality of fragment pixels of a target image; the blender processing unit capable of executing at least two parallel threads of operation, wherein said blender processing unit multiplexes in time a plurality of blending functions and memory operations on different fragments; the blender processing unit supporting concurrent multithreaded processing of the plurality of fragments with different blending functions applied to each fragment; the blender processing unit processes each of the multiple concurrent threads in round robin fashion; the blender processing unit comprising multiple register files, multiple execution units, and multiple instruction pointers wherein each parallel thread is associated with a specific and predetermined instruction memory and instruction pointer; and the blender processing unit comprising multiple instruction memories, wherein each instruction memory is associated with one thread and each instruction memory contains instruction code formatted as a very long instruction word and includes multiple op-codes, multiple destination descriptors, and multiple source descriptors.