CHIP MODE ISOLATION AND CROSS-TALK REDUCTION THROUGH BURIED METAL LAYERS AND THROUGH-VIAS

摘要

A method for fabricating a chip surface base includes preparing a first substrate, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias, preparing a second substrate, bonding the first and second substrates and exposing the metal fillings. A method for fabricating a chip surface base includes preparing a first and second substrate, depositing a metal on at least one of the first and second substrates, bonding the first and second substrates, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias and exposing the metal fillings. A chip surface base device includes a first substrate, a second substrate, a metal layer disposed between the first and second substrates and a plurality of vias disposed on the first substrate.

主权项

1. A chip surface base device, comprising:
a first substrate; a plurality of vias formed in the first substrate; metal fillings deposited into the plurality of vias; and a second substrate bonded with the first substrate, wherein the metal fillings are exposed.