发明名称 SEMICONDUCTOR PACKAGES INCLUDING A MULTI-LAYERED DIELECTRIC LAYER AND METHODS OF MANUFACTURING THE SAME
摘要 The embedded package includes a semiconductor chip having contact portions disposed on a top surface thereof, a first dielectric layer substantially surrounding sidewalls of the semiconductor chip and including first fillers dispersed therein, a second dielectric layer substantially covering the top surface of the semiconductor chip and including second fillers dispersed therein, and first external interconnection portions disposed on the second dielectric layer and electrically connected to the contact portions, wherein an average size of the first fillers is different from that of the second fillers.
申请公布号 US2015155262(A1) 申请公布日期 2015.06.04
申请号 US201514617532 申请日期 2015.02.09
申请人 SK hynix Inc. 发明人 KIM Seung Jee
分类号 H01L23/00;H01L21/768;H01L21/56 主分类号 H01L23/00
代理机构 代理人
主权项 1. A method of manufacturing an embedded package, the method comprising: providing a first dielectric layer including first fillers over a semiconductor chip and stacking a second dielectric layer including second fillers having a different average size from the first fillers on the first dielectric layer; laminating the first and second dielectric layers on the semiconductor chip to embed the semiconductor chip in the first dielectric layer; patterning the second dielectric layer to expose contact portions of the semiconductor chip; and forming first external interconnection portions electrically connected to the contact portions on the second dielectric layer.
地址 Icheon-si KR