| 摘要 |
The present invention relates to a circuit (1) for detecting a reverse current condition of a DCDC converter (2). The circuit uses a simple logic gate, such as an AND gate, in order to detect voltage of a determined node (7) of a DCDC converter. The electric wave of a gated signal (27) is controlled by timing control signals (SW1, SW2) of the DCDC converter and delay cells (16, 17), so a positive state or a negative state of voltage detected at the node (7) is clearly transmitted to an output timing control circuit (25) through a logic gate (18), a flip-flop or latch circuit (19), and an up-down counter (29). The up-down counter is increased or decreased depending on whether the reverse current condition at the node exist or not, and a count value of the up-down counter determines the duration of on-hours of a 2-phase timing control signal (SW2). |
