发明名称 Semiconductor device comprising a photoelectric conversion portion
摘要 In a semiconductor device, power consumption is reduced. Further, a standby circuit is formed of a few elements, and thus increase in the circuit area of the semiconductor device is prevented. The standby circuit provided in the semiconductor device is formed of only one transistor and voltage supplied to the transistor is switched, whereby output current of the semiconductor device is controlled. As a result, the output current of the semiconductor device in a standby state can be substantially zero, so that the power consumption can be reduced. By using an oxide semiconductor for a semiconductor layer of a transistor, leakage current can be suppressed as low as possible.
申请公布号 US9048788(B2) 申请公布日期 2015.06.02
申请号 US201213454407 申请日期 2012.04.24
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Hirose Atsushi
分类号 H03F3/08 主分类号 H03F3/08
代理机构 Robinson Intellectual Property Law Office, P.C. 代理人 Robinson Eric J.;Robinson Intellectual Property Law Office, P.C.
主权项 1. A semiconductor device comprising a photoelectric conversion portion comprising: a first terminal; a second terminal; a third terminal; a photoelectric conversion element electrically connected to the first terminal; a standby circuit including a first transistor comprising an oxide semiconductor layer; and a current amplifier circuit comprising a second transistor electrically connected to the photoelectric conversion element, the current amplifier circuit being configured to amplify a current generated in the photoelectric conversion element; wherein: a gate of the first transistor is electrically connected to the second terminal; one terminal of a resistor is electrically connected to the third terminal; one of a source and a drain of the second transistor is electrically connected to a gate of the second transistor; one of a source and a drain of the first transistor is electrically connected to the photoelectric conversion element and the gate of the second transistor; and the other of the source and the drain of the first transistor and the other of the source and the drain of the second transistor are electrically connected to the third terminal.
地址 Atsugi-shi, Kanagawa-ken JP
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