发明名称 Chip package
摘要 A chip package structure includes a package body, a first lead and a second lead. Elements embedded inside the package body include a core circuit having at least one first connection terminal, at least one ESD protection circuit having at least one second connection terminal, at least one third connection terminal and at least one interconnection structure. The interconnection structure is electrically connected to the second connection terminal and the third connection terminal. The first lead on the package body is electrically connected to the second connection terminal and an external circuit. The second lead on the package body electrically connects the first connection terminal and the third connection terminal. The second lead and the first lead are separate in structure.
申请公布号 US9048243(B2) 申请公布日期 2015.06.02
申请号 US201213674903 申请日期 2012.11.12
申请人 Novatek Microelectronics Corp. 发明人 Cheng Jhih-Siou;Lin Tzu-Chiang;Wu Chia-En;Cho Chun-Yung;Chen Cheng-Hung;Huang Ju-Lin
分类号 H01L23/12;H01L23/48;H01L23/52;H01L29/40;H01L23/538;H01L23/60;H05K9/00;H01L25/065 主分类号 H01L23/12
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A chip package structure, comprising: a package body, comprising: a first core circuit comprising at least one first connection terminal thereon;an electrostatic discharge protection circuit comprising at least one second connection terminal thereon;at least one third connection terminal; andat least one interconnection structure electrically connected to the second connection terminal and the third connection terminal; a first lead configured on the package body and electrically connected to the second connection terminal and an external circuit; and a second lead configured on the package body and electrically connecting the first connection terminal and the third connection terminal, wherein the second lead and the first lead are separate.
地址 Hsinchu TW