Concurrent operation of plural flash memories

摘要

A device comprises an address storage device. A first circuit includes a first flash memory, configured to sequentially receive first and second addresses and store the first address in the address storage device. The first circuit has a first set of control inputs for causing the first circuit to perform a first operation from the group consisting of read, program and erase on a cell of the first flash memory corresponding to a selected one of the first and second addresses. A second circuit includes a second flash memory, configured to receive the second address. The second circuit has a second set of control inputs for causing the second circuit to read data from a cell of the second flash memory corresponding to the second address while the first operation is being performed.

主权项

1. A device comprising:
a first circuit providing a signal used by a first memory, the first circuit configured to perform an operation in the first memory; and a second circuit connected to use the signal from the first circuit, the second circuit configured to read from a second memory while the operation is being performed.