| 发明名称 |
INTEGRATED CIRCUIT WITH A HIGH-SPEED DEBUG ACCESS PORT |
| 摘要 |
An integrated circuit with a high-speed debug access port includes interface circuitry and a dedicated debug port in the interface circuitry. The interface circuitry includes a function circuit block that is used to receive a data packet from external circuitry coupled to the integrated circuit. The dedicated debug port is coupled to the function circuit block and is used to transmit the received data packet to debug circuitry on the integrated circuit. The interface circuitry may include a peripheral component interconnect express (PCIe) interface circuit. |
| 申请公布号 |
US2015149843(A1) |
申请公布日期 |
2015.05.28 |
| 申请号 |
US201314087690 |
申请日期 |
2013.11.22 |
| 申请人 |
Altera Corporation |
发明人 |
Finan Christopher D. |
| 分类号 |
G01R31/3177 |
主分类号 |
G01R31/3177 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit comprising:
high speed serial interface circuitry having a function circuit block that receives a data packet from external circuitry; and a dedicated debug port in the high speed serial interface circuitry coupled to the function circuit block that transmits the received data packet to debug circuitry on the integrated circuit. |
| 地址 |
San Jose CA US |
