发明名称 HK EMBODIED FLASH MEMORY AND METHODS OF FORMING THE SAME
摘要 A method includes forming a selection gate and a control gate for a flash memory cell in a memory device region. The selection gate and the control gate are over a semiconductor substrate. A protection layer is formed to cover the selection gate and the control gate. Stacked layers are formed in a logic device region, wherein the stacked layers extend to overlap the selection gate and the control gate. The stacked layers are patterned to form a gate stack for a logic device in the logic device region. After the patterning, an etching step is performed to etch a residue of the stacked layers in a boundary region of the memory device region. After the etching step, the protection layer is removed from the memory device region. Source and drain regions are formed for each of the flash memory cell and the logic device.
申请公布号 US2015137206(A1) 申请公布日期 2015.05.21
申请号 US201414157599 申请日期 2014.01.17
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Liu Ming-Chyi;Huang Wei-Hang;Chang Yu-Hsing;Wu Chang-Ming;Wu Wei Cheng;Liu Shih-Chang;Chuang Harry-Hak-Lay;Tsai Chia-Shiung;Lee Ru-Liang
分类号 H01L29/788;H01L29/423;H01L21/311;H01L21/3105;H01L21/762;H01L21/306;H01L29/49;H01L29/66;H01L29/06 主分类号 H01L29/788
代理机构 代理人
主权项 1. A method comprising: forming a selection gate and a control gate for a flash memory cell in a memory device region, wherein the selection gate and the control gate are over a semiconductor substrate; forming a protection layer to cover the selection gate and the control gate; forming stacked layers in a logic device region, wherein the stacked layers are over the semiconductor substrate, and wherein the stacked layers extend to overlap the selection gate and the control gate; patterning the stacked layers to form a gate stack for a logic device in the logic device region; after the patterning, performing an etching step to etch a residue of the stacked layers in a boundary region of the memory device region; after the etching step, removing the protection layer from the memory device region; and forming source and drain regions for each of the flash memory cell and the logic device.
地址 Hsin-Chu TW