FORMATION OF AN ASYMMETRIC TRENCH IN A SEMICONDUCTOR SUBSTRATE AND A BIPOLAR SEMICONDUCTOR DEVICE HAVING AN ASYMMETRIC TRENCH ISOLATION REGION

摘要

Disclosed is a trench formation technique wherein an opening having a first sidewall with planar contour and a second sidewall with a saw-tooth contour is etched through a semiconductor layer and into a semiconductor substrate. Then, a crystallographic wet etch process expands the portion of the opening within the semiconductor substrate to form a trench. Due to the different contours of the sidewalls and, thereby the different crystal orientations, one sidewall etches faster than the other, resulting in an asymmetric trench. Also disclosed is a bipolar semiconductor device formation method that incorporates the above-mentioned trench formation technique when forming a trench isolation region that undercuts an extrinsic base region and surrounds a collector pedestal. The asymmetry of the trench ensures that the trench isolation region has a relatively narrow width and, thereby ensures that both collector-to-base capacitance Ccb and collector resistance Rc are minimized within the resulting bipolar semiconductor device.

主权项

1. A method comprising:
forming a semiconductor layer on a semiconductor substrate, said semiconductor substrate comprising a first semiconductor material and said semiconductor layer comprising a second semiconductor material different from said first semiconductor material; forming a mask layer on said semiconductor layer; patterning an opening in said mask layer, said opening having a first sidewall and a second sidewall opposite said first sidewall, said first sidewall having a planar contour and said second sidewall having a saw-tooth contour; performing a first etch process to extend said opening through said semiconductor layer and into said semiconductor substrate; and performing a second etch process to expand a lower portion of said opening within said semiconductor substrate, said second etch process comprising a crystallographic etch process that etches said first sidewall and said second sidewall within said semiconductor substrate at different rates such that an asymmetric trench is formed within said semiconductor substrate below said semiconductor layer.