HIGH VOLTAGE JUNCTION FIELD EFFECT TRANSISTOR

摘要

The present invention discloses a high voltage JFET. The high voltage JFET includes a second conductivity type drift region located on the first conductivity type epitaxial layer; a second conductivity type drain heavily doped region located in the second conductivity type drift region; a drain terminal oxygen region located on the second conductivity type drift region and at a side of the second conductivity type drain heavily doped region; a first conductivity type well region located at a side of the second conductivity type drift region; a second conductivity type source heavily doped region and a first conductivity type gate heavily doped region located on the first conductivity type well region, and a gate source terminal oxygen region; a second conductivity type channel layer located between the second conductivity type source heavily doped region and the second conductivity type drift region; a dielectric layer and a field electrode plate located on the second conductivity type channel layer. Wherein a drain electrode electrically is led out from the second conductivity type drain heavily doped region; a source electrode electrically is led out from a connection of the field electrode plate and the second conductivity type source heavily doped region; and a gate electrode electrically is led out from the first conductivity type gate heavily doped region. The transistor has a high breakdown voltage and easy to be integrated.

主权项

1. A high voltage junction field effect transistor, comprising:
a semiconductor substrate provided with a first conductivity type epitaxial layer; a second conductivity type drift region located on the first conductivity type epitaxial layer; a second conductivity type drain heavily doped region located in the second conductivity type drift region; a drain terminal oxygen region located on the second conductivity type drift region and at a side of the second conductivity type drain heavily doped region; a first conductivity type well region located at a side of the second conductivity type drift region, the first conductivity type well region being isolated from the second conductivity type drift region by the first conductivity type epitaxial layer; a second conductivity type source heavily doped region and a first conductivity type gate heavily doped region located on the first conductivity type well region, and a gate source terminal oxygen region being provided between the second conductivity type source heavily doped region and the first conductivity type gate heavily doped region to isolate the second conductivity type source heavily doped region from the first conductivity type gate heavily doped region; a second conductivity type channel layer located between the second conductivity type source heavily doped region and the second conductivity type drift region; a field electrode plate located on the second conductivity type channel layer, the field electrode plate extending to a part of the surface of the drain terminal oxygen region, a dielectric layer being provided between the field electrode plate and the second conductivity type channel layer, and also between the field electrode plate and the second conductivity type drift region; wherein a drain electrode electrically is led out from the second conductivity type drain heavily doped region; a source electrode electrically is led out from a connection of the field electrode plate and the second conductivity type source heavily doped region; and a gate electrode electrically is led out from the first conductivity type gate heavily doped region.