Adjusting configuration of a multiple gate transistor by controlling individual fins

摘要

In a sophisticated semiconductor device, FINFET elements may be provided with individually accessible semiconductor fins which may be connected to a controllable interconnect structure for appropriately adjusting the transistor configuration, for instance with respect to current drive capability, replacing defective semiconductor fins and the like. Consequently, different transistor configurations may be obtained on the basis of a standard transistor cell architecture, which may result in increased production yield of highly complex manufacturing strategies in forming non-planar transistor devices.

主权项

1. A semiconductor device, comprising:
a plurality of semiconductor fins, each of which comprises at least one end portion individually electrically accessible and a channel portion connecting to said end portion; a gate electrode structure formed adjacent to said channel portion of each of said plurality of semiconductor fins so as to enable controlling of channel regions provided in said channel portion; a controllable interconnect structure connecting to a first transistor terminal and to each of said individually electrically accessible end portions, said controllable interconnect structure being configured to individually control connection of each of said end portions to said first transistor terminal; a control unit connected to said controllable interconnect structure and being configured to control said interconnect structure on the basis of a target configuration of said transistor; and a second transistor terminal electrically connected to each of said channel portions.