发明名称 PROGRAMMABLE LOGIC DEVICE AND COMPUTER USING THE SAME
摘要 <p>PROBLEM TO BE SOLVED: To solve the problem of limitation of an application range of pipeline processing caused by the large scale of a calculation circuit derived from requirement for a large number of calculators although the pipeline processing has a merit of high throughput because the large number of calculators simultaneously operate calculation.SOLUTION: This problem can be solved by dividing a series of calculation processing into a plurality of calculation logical blocks and sequentially executing the respective calculation processing. In order to efficiently perform the processing, a device has a structure in which reading/writing from/into a RAM for defining the calculation processing and RAM for storing data on the calculation processing is performed through a standard memory path included in a computer system. Time required for the calculation processing is reduced by further achieving inclusion of a function of controlling a bus inside a PLD, provision of a plurality of RAMs for defining the calculation processing to simultaneously perform the calculation processing and writing into the RAM, and the like.</p>
申请公布号 JP2015091045(A) 申请公布日期 2015.05.11
申请号 JP20130230492 申请日期 2013.11.06
申请人 SIGNAL PROCESS LOGIC INC 发明人 SEO YUZO
分类号 H03K19/173 主分类号 H03K19/173
代理机构 代理人
主权项
地址