Method of successive approximation A/D conversion

摘要

According to a method of Successive Approximation Register (SAR) analog to digital conversion, N+1 SAR cycles are performed to obtain an output digital code having N bits. An analog signal is sampled and obtained. After execution of the first N−1 SAR cycles, the Nth SAR cycle is performed by setting a Nth tentative analog signal corresponding to a provisional digital code and comparing the Nth tentative analog signal with the sampled analog signal to obtain a Nth comparison result. The (N+1)th SAR cycle is performed by setting a (N+1)th tentative analog signal based on the Nth comparison result, comparing the (N+1)th tentative analog signal with the sampled analog signal to obtain a second comparison result, and correcting the provisional digital code based on the (N+1)th comparison result to obtain the output digital code. The Nth and (N+1)th SAR cycles each comprise a plurality sub-comparisons and yield a set of sub-results.

主权项

1. A method of Successive Approximation Register (SAR) analog to digital conversion, the method including performance of N+1 SAR cycles to obtain an output digital code having N bits, wherein N is an integer number, the method comprising:
receiving and sampling an analog signal; performing N−1 SAR cycles, each SAR cycle comprising:
setting a tentative analog signal corresponding to an approximate value of the output digital code; andcomparing, using a comparator, the sampled analog signal with the tentative analog signal; performing the Nth SAR cycle by:
setting a Nth tentative analog signal corresponding to a provisional digital code; andcomparing, using the comparator, the Nth tentative analog signal with the sampled analog signal to obtain a Nth comparison result, the comparing comprising performance of a plurality of M sub-comparisons between the Nth tentative analog signal and the sampled analog signal to obtain M sub-results, the Nth comparison result being obtained according to a first decision criterion that takes into account the M sub-results, M being an integer number; performing the (N+1)th SAR cycle by:
setting a (N+1)th tentative analog signal based on the Nth comparison result;comparing, using the comparator, the (N+1)th tentative analog signal with the sampled analog signal to obtain a second comparison result by: performing a plurality of K sub-comparisons with the comparator between the (N+1)th tentative analog signal and the sampled analog signal, to obtain K sub-results, the (N+1)th comparison result being obtained according to a second decision criterion that takes into account the K sub-results, K being an integer number; andcorrecting the provisional digital code based on the (N+1)th comparison result for obtaining the output digital code.