Router and chip circuit

摘要

Routers in a data transfer system relay data between the first node and each of the second nodes. A router includes a load value processing section and an aggregation decision section. The load value processing section obtains information about a load value of another router connected to a communications bus. The load value is a time delay caused by that another router and/or the throughput of that router. The aggregation decision section chooses one of the second nodes at which the data is to be received, and determines a transmission path between the second node chosen and the first node in accordance with information about the load value obtained from each router and information determined during a design process about the number of stages of routers from the first node through each second node and/or the length of data to be transferred.

主权项

1. A router for use in a data transfer system on a network on a chip that includes a first node from which data is transmitted, a plurality of second nodes at any of which the data that has been transmitted from the first node is receivable, and a plurality of routers that relay the data to be transferred between the first node and each of the second nodes, the router comprising:
a time delay processing circuit configured to obtain information about a load value of another router that is connected to a communications bus, the load value being a time delay caused by that another router; and an aggregation decision circuit configured to choose, in a situation where multiple traffic flows have been generated, one of the second nodes at which the data is to be received, and configured to determine a transmission path between the second node chosen and the first node in accordance with:
information about the load value obtained from each said router; andinformation determined during a design process about the number of stages of routers from the first node through each said second node.