Thin film transistor, method for manufacturing same, active matrix substrate, display panel and display device

摘要

The present invention provides a thin film transistor including an oxide semiconductor layer (4) for electrically connecting a signal electrode (6a) and a drain electrode (7a), the an oxide semiconductor layer being made from an oxide semiconductor; and a barrier layer (6b) made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, the barrier layer (6b) being in touch with the signal electrode (6a) and the oxide semiconductor layer (4) and separating the signal electrode (6a) from the oxide semiconductor layer (4). Because of this configuration, the thin film transistor can form and maintain an ohmic contact between the first electrode and the channel layer, thereby being a thin film transistor with good properties.

主权项

1. A thin film transistor comprising:
a channel layer arranged to electrically connect a first electrode and a second electrode, the channel layer being made from an oxide semiconductor; a protection layer provided directly on an upper surface of the first electrode and an upper surface of the second electrode, the protection layer also being in direct contact with an upper surface of the channel layer; an insulating layer provided directly on an upper surface of the protection layer; a pixel electrode provided directly on an upper surface of the insulating layer; and a first barrier layer made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, wherein the first barrier layer is in contact with the first electrode and the channel layer and is arranged to separate the first electrode from the channel layer; the pixel electrode is in direct contact with the upper surface of the second electrode through contact holes provided within the protection layer and the insulating layer; and a lateral edge of the first barrier layer is arranged inward from a lateral edge of the channel layer, the lateral edge of the channel layer being directly covered by the protection layer.