发明名称 CO-SUPPORT FOR XFD PACKAGING
摘要 A microelectronic package has a dielectric element with first and second parallel apertures. A first microelectronic element has contacts overlying the first aperture, and a second microelectronic element has contacts overlying the second aperture. The second microelectronic element can overlie a rear face of the first microelectronic element and the same surface of the dielectric element as the first microelectronic element. First terminals on a second surface of the dielectric element between said first and second apertures can be configured to carry all data signals for read and write access to memory locations within the first and second microelectronic elements.
申请公布号 US2015115472(A1) 申请公布日期 2015.04.30
申请号 US201314063119 申请日期 2013.10.25
申请人 Invensas Corporation 发明人 Crisp Richard Dewitt;Haba Belgacem;Zohni Wael
分类号 H01L25/065;H01L23/50;H01L23/00 主分类号 H01L25/065
代理机构 代理人
主权项 1. A microelectronic package, comprising: a dielectric element having first and second oppositely facing surfaces, and having first and second spaced apart apertures each extending between the first and second surfaces; a first microelectronic element having a front face facing said first surface, a rear face facing away from said first surface and an edge extending between said front and rear faces, said first microelectronic element having contacts exposed at said front face; and a second microelectronic element having a front face partially overlying said rear face of said first microelectronic element and facing said first surface, said second microelectronic element having contacts disposed in a central region of its front face, said contacts disposed beyond said edge of said first microelectronic element, said dielectric element having terminals at said second surface, said contacts of said first microelectronic element overlying said first aperture and electrically coupled with said terminals, and said contacts of said second microelectronic element overlying said second aperture and electrically coupled with said terminals, said terminals including a plurality of first terminals between said first and second apertures configured to carry all data signals for read and write access to random access addressable memory locations of memory storage arrays within the first and second microelectronic elements.
地址 San Jose CA US