| 摘要 |
A functional simulator with watchpoint support includes a CPU having a first-level DMI cache, a watchpoint manager having a second-level DMI cache, an interconnect module, and a memory controller. The simulator is operated by a front-end tool. Watchpoints corresponding to a predetermined memory addresses are set by the front-end tool and stored as a watchpoint address list in the watchpoint manager. When a memory access request is received by the first-level DMI cache, after a failure to complete the memory access request, the CPU transmits the request to the watchpoint manager. The watchpoint manager searches for a memory address associated with the memory access request in the watchpoint address list. If a match is found, the watchpoint manager generates a watchpoint hit signal and notifies the front-end tool. |
| 主权项 |
1. A functional simulator with watchpoint support and operated by a front-end tool, the functional simulator comprising:
a central processing unit (CPU) including a first-level direct memory interface (DMI) cache for storing a first plurality of memory pages and associated memory addresses, wherein the CPU receives a memory access request for a first memory address; a watchpoint manager, connected to the CPU, for storing a watchpoint address list comprising a second plurality of memory pages and associated memory addresses, wherein for the watchpoint address list, a corresponding plurality of watchpoints are assigned by the front-end tool, wherein the watchpoint manager receives the memory access request if the first-level DMI cache fails to complete the memory access request, searches the first memory address associated with the memory access request in the watchpoint address list, generates a watchpoint hit signal when the first memory address is present in the watchpoint address list, and notifies the front-end tool when the watchpoint hit signal is generated. |
