Read and write barriers for flexible and efficient garbage collection

摘要

Described herein are techniques to provide read and write barriers for flexible and efficient garbage collection. A memory heap is split into pages. Each page is aligned to an address that is a multiple of a particular power of two. When generating read and write operations, code is generated to execute the write barrier or the read barrier. At this point, the page alignment for each pointer is known; for example, if the page alignment is the same for all pointers in the system. With this page structure, it is possible to find the page start by masking the address of any heap allocated object on the page with a mask based on the page alignment (bitwise-and operation). A plurality of flags are established on a page. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

主权项

1. A memory manager comprising:
a heap paginator configured to split a memory heap into a plurality of pages, with each page of the memory heap aligned to an address that is a multiple of a particular power of two, wherein each page includes a plurality of pointers; a software code generator configured to generate code to execute a write barrier when write operations are performed, wherein a page alignment for each of the plurality of pointers is known; a bitwise operator configured to determine a page start of a respective page of the plurality of pages by masking an address of a heap allocated object on the respective page based on bitwise-and operation page alignment; and a bit storage configured to establish a plurality of flags on a particular page, wherein the software code generator is further configured to split a write barrier for an assignment into filtering parts and implementing parts, wherein the filtering parts comprise one or more checks, wherein at least one check of the one or more checks is based on more than one flag, wherein the one or more checks are combined with one or more conditional branches or call instructions that can divert control flow to the implementing parts.