| 摘要 |
A method performed in a power bridge (3) comprising multiple arms (B1, B2, Bi, Bn). Each arm comprises upper and lower semiconductor switches arranged in series and connected in parallel to first and second terminals (B+, B−) of a common voltage source (2). The mid-point of the arm is connected to a phase of an electrical load (1). The aforementioned switches are controlled complementarily by pulses having a duty factor set value (RC1, RC2, RCi, RCn) determined as a function of a first phase voltage set value (V1, V2, Vi, Vn) in relation to a reference terminal of the electrical load (1) and of a common-mode voltage (V0) in relation to one of the first or second terminals, such as to control the switching losses of the switches. The common-mode voltage (V0) is determined such as to balance switching losses and conduction losses between the switches. |
| 主权项 |
1. Method for controlling a power bridge (3) comprising a plurality of arms (B1, B2, Bi, Bn) each comprising in series upper and lower semiconductor switches (4) which are designed to be connected in parallel to the first and second terminals (B+, B−) of a common source of voltage (2), at least one middle point of each of said arms (B1, B2, Bi, Bn) being designed to be connected respectively to at least one phase of an electric load (1), said method being of the type consisting of controlling said upper and lower semiconductor switches (4) in a complementary manner by means of pulses with a set duty cycle (RC1, RC2, RCi, RCn) which is determined according to a first set phase voltage (V1, V2, Vi, Vn), relative to a reference terminal of said electric load (1), and a common mode voltage (V0), relative to one of said first or second terminals (B+, B−) controlling switching losses (21) of said upper and lower semiconductor switches (4), wherein said common mode voltage (V0) is determined such as to obtain balancing (13) of said switching losses (21) and conduction losses (19) between said upper and lower semiconductor switches (4), and said balancing (13) is implemented only when an electrical frequency which modulates said set duty cycle (RC1, RC2, RCi, RCn) is equal to, or lower than, a predetermined threshold. |
