| 摘要 |
<p>It is an objective of the present invention to provide a single photon counting pixel detector chip having a negligible dead time and consequentially high frame rates. This objective is achieved by a single photon counting pixel detector chip, comprising:
a) a layer of photosensitive material;
b) an N x M array of photo-detector diodes arranged in said layer of photosensitive material; each of said photo-detector diodes having a diode output interface;
c) a N x M array of readout unit cells, one readout unit cell for each photo-detector diode;
d) said readout unit cell comprising:
d1) an input interface connected to said diode output
interface, a high-gain charge to voltage amplifying means and a pixel counter being connected to an output of the high-gain voltage amplifying means,
d2) said pixel counter being split into a first number
of nibble counters, each nibble counter having an individual number of bits, wherein for each bit a basic counter cell is provided; said basic counter cell comprising a counting element, a switch, a temporary storage element and an output stage, wherein said basic counter cells are cascaded;
e) a side shift register to read out the nibble counters row-wise with a predetermined number of nibble row selections wherein the data stored in the temporary storage elements on the selected nibble counter row are sent on a parallel bus as currents and are transformed in digital levels by parallel bus receivers.</p> |
