| 摘要 |
A transistor array comprising a first conductor layer defining a plurality of source conductors 2,4 and a plurality of drain conductors 6, 8, 10, 12; the source and drain conductors are associated with a respective transistor. A semiconductor layer 26 defines semiconductor channels between said source and drain conductors. A second conductor layer defines a plurality of gate conductors 16 each associated with a respective set of transistors. One or more storage capacitor conductors may be capacitively coupled to the drain conductors of a respective set of transistors. The gate conductor may be used to switch the transistors between on and off states, whilst the storage capacitor conductors are used to reduce the conductivity of one or more portions of the semiconductor layer connecting the drain conductor of each transistor in the on state to source and/or drain conductors other than those associated with that transistor. The aim of this is transistor array is to reduce the parasitic leakage between conductors. |
