An embodiment includes an apparatus comprising: an out-of-band cryptoprocess or including secure non- volatile storage that couples to a root index, having a fixed address, and comprises first and second variables referenced by the root index; and semiconductor integrated code (SIC) including embedded processor logic to initialize a processor and embedded memory logic to initialize a memory coupled to the processor; wherein (a) the SIC is to be executed responsive to resetting the processor and prior to providing control to boot code, and (b) the SIC is to perform pre-boot operations in response to accessing at least one of the first and second variables. Other embodiments are described herein.
申请公布号
WO2015048922(A1)
申请公布日期
2015.04.09
申请号
WO2013CN84806
申请日期
2013.10.02
申请人
INTEL CORPORATION;YAO, JIEWEN;ZIMMER, VINCENT J.;ADAMS, NICHOLAS J.;WISEMAN, WILLARD M.;LONG, QIN;LI, SHIHUI
发明人
YAO, JIEWEN;ZIMMER, VINCENT J.;ADAMS, NICHOLAS J.;WISEMAN, WILLARD M.;LONG, QIN;LI, SHIHUI