发明名称 PREVENTING TIMING VIOLATIONS
摘要 An apparatus, comprising a clock adapted to provide a clock signal alternating with a cycle between a first level and a second level if a timing violation is not detected; a first latch adapted to be clocked such that it passes a first signal when the clock signal is at the first level; a second combinational logic adapted to output a second signal based on the first signal passed through the first latch; a second latch adapted to be clocked such that it passes the second signal when the clock signal is at the second level; a detecting means adapted to detect the timing violation of at least one of the first signal and of the second signal; a time stretching means adapted to stretch, if the timing violation is detected, the clock such that the clock alternates between the first level and the second level with a delay.
申请公布号 WO2015049328(A1) 申请公布日期 2015.04.09
申请号 WO2014EP71134 申请日期 2014.10.02
申请人 AALTO UNIVERSITY FOUNDATION;TEKNOLOGIAN TUTKIMUSKESKUS VTT 发明人 MÄKIPÄÄ, JANI;KOSKINEN, LAURI;TURNQUIST, MATTHEW;HIIENKARI, MARKUS
分类号 H03K5/19;G06F1/04;H03K19/003 主分类号 H03K5/19
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